Vol. 3B 16-29

INTERPRETING MACHINE-CHECK ERROR CODES

The Bold faced binary encodings are the only encodings used by the processor for MC4_STATUS[15:0].

16.10.2   Other_Info Field (all MCA Error Types)

The MC4_STATUS[56:32] field is common to the processor's three MCA error types (A, B & C).

B

Bus  and 

Interconnect
Error

0000 100x 0000 1111 Not used but this encoding is reserved for compatibility with other MCA 

implementations

0000 101x 0000 1111 Not used but this encoding is reserved for compatibility with other MCA 

implementations

0000 110x 0000 1111 Not used but this encoding is reserved for compatibility with other MCA 

implementations

0000 1110 0000 1111 Bus and Interconnection Error Type Code
0000 1111 0000 1111 Not used but this encoding is reserved for compatibility with other MCA 

implementations

Table 16-34.  Other Information Field Bit Definition 

Bit Field Name

Bits

Description

39:32

8-bit Correctable 

Event Count

Holds a count of the number of correctable events since cold reset.  This is a saturating counter; 

the counter begins at 1 (with the first error) and saturates at a count of 255.

41:40

MC4_MISC 

format type

The value in this field specifies the format of information in the MC4_MISC register. Currently, 

only two values are defined. Valid only when MISCV is asserted.

43:42

–

Reserved

51:44

ECC syndrome

ECC syndrome value for a correctable ECC event when the “Valid ECC syndrome” bit is asserted

52

Valid ECC 

syndrome

Set when correctable ECC event supplies the ECC syndrome

54:53

Threshold-Based 

Error Status

00: No tracking - No hardware status tracking is provided for the structure reporting this event.
01: Green - Status tracking is provided for the structure posting the event; the current status is 

green (below threshold).
10: Yellow - Status tracking is provided for the structure posting the event; the current status is 

yellow (above threshold).
11: Reserved for future use

Valid only if Valid bit (bit 63) is set
Undefined if the UC bit (bit 61) is set

56:55

–

Reserved

Table 16-33.  Incremental MCA Error Code for Intel Xeon Processor MP 7100  (Contd.)

Processor MCA_Error_Code (MC4_STATUS[15:0])