Vol. 3B 16-9

INTERPRETING MACHINE-CHECK ERROR CODES

16.3.3   Memory Controller Errors

23-16

Reserved

Reserved

31-24

Reserved except for 

the following

00h - No Error
03h - Reset firmware did not complete
08h - Received an invalid CMPD
0Ah - Invalid Power Management Request
0Dh - Invalid S-state transition
11h - VID controller does not match POC controller selected
1Ah - MSID from POC does not match CPU MSID

56-32

Reserved

Reserved

Status register validity  

indicators

1

 

57-63

NOTES:

1. These fields are architecturally defined. Refer to Chapter 15, “Machine-Check Architecture,” for more information.

Table 16-11.  Incremental Memory Controller Error Codes of Machine Check for IA32_MC8_STATUS

Type

Bit No.  Bit Function 

Bit Description

MCA error codes

1

 

NOTES:

1. These fields are architecturally defined. Refer to Chapter 15, “Machine-Check Architecture,” for more information.

0-15

MCACOD

Memory error format: 1MMMCCCC

Model specific errors

16

Read ECC error

if 1, ECC occurred on a read

17

RAS ECC error

If 1, ECC occurred on a scrub

18

Write parity error

If 1, bad parity on a write

19

Redundancy loss

if 1, Error in half of redundant memory

20

Reserved

Reserved

21

Memory range error

If 1, Memory access out of range

22

RTID out of range 

If 1, Internal ID invalid

23

Address parity error

If 1, bad address parity 

24

Byte enable parity 

error

If 1, bad enable parity 

Other information

37-25  Reserved

Reserved

52:38

CORE_ERR_CNT

Corrected error count

56-53

Reserved

Reserved

Status register validity  

indicators

1

 

57-63

Type

Bit No.  Bit Function 

Bit Description