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Vol. 3B 14-3

POWER AND THERMAL MANAGEMENT

// time window. 

PercentPerformance = PercentBusy * (ACNT/MCNT);

// This example does not cover the additional logic or algorithms
//  necessary to coordinate multiple logical processors to a target P-state.

TargetPstate = FindPstate(PercentPerformance);

if (TargetPstate ≠ currentPstate) {

SetPState(TargetPstate);


// WRMSR of MCNT and ACNT should be performed without delay.

   // Software needs to exercise care to avoid delays between 
   // the two WRMSRs (for example, interrupts).
 

 WRMSR(IA32_MPERF, 0);

 

 WRMSR(IA32_APERF, 0);

14.3 

SYSTEM SOFTWARE CONSIDERATIONS AND OPPORTUNISTIC PROCESSOR 

PERFORMANCE OPERATION

An Intel 64 processor may support a form of processor operation that takes advantage of design headroom to 
opportunistically increase performance. The Intel Turbo Boost Technology can convert thermal headroom into 
higher performance across multi-threaded and single-threaded workloads. The Intel Dynamic Acceleration feature 
can convert thermal headroom into higher performance if only one thread is active.

14.3.1 

Intel Dynamic Acceleration

Intel Core 2 Duo processor T 7700 introduces Intel Dynamic Acceleration (IDA). IDA takes advantage of thermal 
design headroom and opportunistically allows a single core to operate at a higher performance level when the 
operating system requests increased performance. 

14.3.2 

System Software Interfaces for Opportunistic Processor Performance Operation

Opportunistic processor operation, applicable to Intel Dynamic Acceleration and Intel Turbo Boost Technology, has 
the following characteristics:

A transition from a normal state of operation (e.g. IDA/Turbo mode disengaged) to a target state is not 
guaranteed, but may occur opportunistically after the corresponding enable mechanism is activated, the 
headroom is available and certain criteria are met.

The opportunistic processor performance operation is generally transparent to most application software.

System software (BIOS and Operating system) must be aware of hardware support for opportunistic processor 
performance operation and may need to temporarily disengage opportunistic processor performance operation 
when it requires more predictable processor operation. 

When opportunistic processor performance operation is engaged, the OS should use hardware coordination 
feedback mechanisms to prevent un-intended policy effects if it is activated during inappropriate situations.

14.3.2.1   Discover Hardware Support and Enabling of Opportunistic Processor Operation

If an Intel 64 processor has hardware support for opportunistic processor performance operation, the power-on 
default state of IA32_MISC_ENABLE[38] indicates the presence of such hardware support. For Intel 64 processors 
that support opportunistic processor performance operation, the default value is 1, indicating its presence. For 
processors that do not support opportunistic processor performance operation, the default value is 0. The power-