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INTERRUPT AND EXCEPTION HANDLING

register. See Section 8.1.8, “x87 FPU Instruction and Data (Operand) Pointers” in Chapter 8 of the Intel® 64 and 
IA-32 Architectures Software Developer’s Manual, Volume 1, for more information about information the FPU saves 
for use in handling floating-point-error exceptions.

Program State Change

A program-state change generally accompanies an x87 FPU floating-point exception because the handling of the 
exception is delayed until the next waiting x87 FPU floating-point or WAIT/FWAIT instruction following the faulting 
instruction. The x87 FPU, however, saves sufficient information about the error condition to allow recovery from the 
error and re-execution of the faulting instruction if needed.
In situations where non- x87 FPU floating-point instructions depend on the results of an x87 FPU floating-point 
instruction, a WAIT or FWAIT instruction can be inserted in front of a dependent instruction to force a pending x87 
FPU floating-point exception to be handled before the dependent instruction is executed. See “x87 FPU Exception 
Synchronization” in Chapter 8 of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1, 
for more information about synchronization of x87 floating-point-error exceptions.