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Vol. 3D 41-65

SGX INSTRUCTION REFERENCES

EACCEPT—Accept Changes to an EPC Page  

Instruction Operand Encoding

Description

This leaf function accepts changes to a page in the running enclave by verifying that the security attributes speci-
fied in the SECINFO match the security attributes of the page in the EPCM. This instruction leaf can only be 
executed when inside the enclave. 
RBX contains the effective address of a SECINFO structure while RCX contains the effective address of an EPC 
page. The table below provides additional information on the memory parameter of the EACCEPT leaf function.

EACCEPT Memory Parameter Semantics

The instruction faults if any of the following: 

EACCEPT Faulting Conditions

The error codes are:

Concurrency Restrictions

Opcode/

Instruction

Op/En

64/32 

bit Mode 

Support

CPUID 

Feature 

Flag

Description

 EAX = 05H

IR

V/V

SGX2

This leaf function accepts changes made by system software to 

an EPC page in the running enclave.

ENCLU[EACCEPT]

Op/En

EAX

RBX

RCX

IR

EACCEPT (In)

Return Error Code (Out)

Address of a SECINFO (In)

Address of the destination EPC page (In)

SECINFO

EPCPAGE (Destination)

Read access permitted by Non Enclave 

Read access permitted by Enclave

The operands are not properly aligned.

If security attributes of the SECINFO page make the page inaccessible.

The EPC page is locked by another thread.

RBX does not contain an effective address in an EPC page in the running enclave.

The EPC page is not valid.

RCX does not contain an effective address of an EPC page in the running enclave.

SECINFO contains an invalid request.

Page type is PT_REG and MODIFIED bit is 0.
Page type is PT_TCS or PT_TRIM and PENDING bit is 0 and MODIFIED bit is 1.

Table 41-46.  EACCEPT Return Value in RAX

 Error Code (see Table 41-3)

Description

No Error

EACCEPT successful

SGX_PAGE_ATTRIBUTES_MISMATCH

The attributes of the target EPC page do not match the expected values

SGX_NOT_TRACKED

The OS did not complete an ETRACK on the target page

Table 41-47.  Concurrency Restrictions of EACCEPT with Intel® SGX Instructions - 1of 2

Operation

EEXIT

EADD

EBLOCK

ECRE

ATE

EDBGRD/

WR

EENTER/

ERESUME

EEXTEND

EGETKEY

EINIT

ELDB/ELDU

EPA

Param

Targ VA

SECS Targ SECS Targ SECS SECS

Targ SECS TCS SSA SECS Targ SECS Param SECS SECS Targ VA SECS VA