41-58 Vol. 3D

SGX INSTRUCTION REFERENCES

(* Check concurrency with other Intel SGX instructions *)
IF (Other Intel SGX instructions using tracking facility on this SECS) 

THEN #GP(0); FI;

IF (EPCM(DS:RCX). VALID = 0)

THEN #PF(DS:RCX); FI;

IF (EPCM(DS:RCX).PT ≠ PT_SECS) 

THEN #PF(DS:RCX); FI;

(* All processors must have completed the previous tracking cycle*)
IF ( (DS:RCX).TRACKING ≠ 0) ) 

THEN 

RFLAGS.ZF  1;
RAX SGX_PREV_TRK_INCMPL;
GOTO DONE;

ELSE

RAX 0;
RFLAGS.ZF  0;

FI;

DONE:
RFLAGS.ZF,CF,PF,AF,OF,SF  0;

Flags Affected

Sets ZF if SECS is in use or invalid, otherwise cleared. Clears CF, PF, AF, OF, SF 

Protected Mode Exceptions

#GP(0)

If a memory operand effective address is outside the DS segment limit.
If a memory operand is not properly aligned.
If another thread is concurrently using the tracking facility on this SECS.

#PF(error code)

If a page fault occurs in accessing memory operands.
If a memory operand is not an EPC page.

64-Bit Mode Exceptions

#GP(0)

If a memory operand is non-canonical form.
If a memory operand is not properly aligned.
If the specified EPC resource is in use.

#PF(error code)

If a page fault occurs in accessing memory operands.
If a memory operand is not an EPC page.

Table 41-42.  ETRACK Return Value in RAX

 Error Code (see Table 41-3)

Value

Description

No Error

0

ETRACK successful

SGX_PREV_TRK_INCMPL

All processors did not complete the previous shoot-down sequence