41-56 Vol. 3D

SGX INSTRUCTION REFERENCES

RAX SGX_CHILD_PRESENT;
GOTO ERROR_EXIT;

FI;
EPCM(DS:RCX).VALID  0;
GOTO DONE; 

FI;

TEMP_SECS  Get_SECS_ADDRESS();

IF (Other threads active using SECS) 

THEN 

RFLAGS.ZF  1;
RAX SGX_ENCLAVE_ACT;
GOTO ERROR_EXIT;

FI;

DONE:
RAX 0;
RFLAGS.ZF  0;

ERROR_EXIT:
RFLAGS.CF,PF,AF,OF,SF  0;

Flags Affected

Sets ZF if unsuccessful, otherwise cleared and RAX returns error code. Clears CF, PF, AF, OF, SF 

Protected Mode Exceptions

#GP(0)

If a memory operand effective address is outside the DS segment limit.
If a memory operand is not properly aligned.
If another Intel SGX instruction is accessing the page.

#PF(error code)

If a page fault occurs in accessing memory operands.
If the memory operand is not an EPC page.

64-Bit Mode Exceptions

#GP(0)

If the memory operand is non-canonical form.
If a memory operand is not properly aligned.
If another Intel SGX instruction is accessing the page.

#PF(error code)

If a page fault occurs in accessing memory operands.
If the memory operand is not an EPC page.