Vol. 3D 41-53
SGX INSTRUCTION REFERENCES
(* Check EPC page must be empty *)
IF (EPCM(DS:RCX). VALID ≠ 0)
THEN #PF(DS:RCX); FI;
(* Clears EPC page *)
DS:RCX[32767:0] 0;
EPCM(DS:RCX).PT PT_VA;
EPCM(DS:RCX).ENCLAVEADDRESS 0;
EPCM(DS:RCX).BLOCKED 0;
EPCM(DS:RCX).PENDING 0;
EPCM(DS:RCX).MODIFIED 0;
EPCM(DS:RCX).PR 0;
EPCM(DS:RCX).RWX 0;
EPCM(DS:RCX).VALID 1;
Flags Affected
None
Protected Mode Exceptions
#GP(0)
If a memory operand effective address is outside the DS segment limit.
If a memory operand is not properly aligned.
If another Intel SGX instruction is accessing the EPC page.
If RBX is not set to PT_VA.
#PF(error code)
If a page fault occurs in accessing memory operands.
If a memory operand is not an EPC page.
If the EPC page is valid.
64-Bit Mode Exceptions
#GP(0)
If a memory operand is non-canonical form.
If a memory operand is not properly aligned.
If another Intel SGX instruction is accessing the EPC page.
If RBX is not set to PT_VA.
#PF(error code)
If a page fault occurs in accessing memory operands.
If a memory operand is not an EPC page.
If the EPC page is valid.