Vol. 3D 41-47

SGX INSTRUCTION REFERENCES

Operation

Temp Variables in EMODPR Operational Flow

IF (DS:RBX is not 64Byte Aligned)

THEN #GP(0); FI;

IF (DS:RCX is not 4KByte Aligned)

THEN #GP(0); FI;

IF (DS:RCX does not resolve within an EPC) 

THEN #PF(DS:RCX); FI;

SCRATCH_SECINFO  DS:RBX;

(* Check for mis-configured SECINFO flags*)
IF ( (SCRATCH_SECINFO reserved fields are not zero ) or

!(SCRATCH_SECINFO.FLAGS.R is 0 or SCRATCH_SECINFO.FLAGS.W is not 0) )
THEN #GP(0); FI;

(* Check concurrency with SGX1 or SGX2 instructions on the EPC page *)
IF (SGX1 or other SGX2 instructions accessing EPC page) 

THEN #GP(0); FI;

IF (EPCM(DS:RCX).VALID is 0 )

THEN #PF(DS:RCX); FI;

(* Check the EPC page for concurrency *)
IF (EPC page in use by another SGX2 instruction) 

THEN 

RFLAGS  1;
RAX  SGX_LOCKFAIL;
GOTO DONE;

FI;

IF ( (EPCM(DS:RCX).PENDING is not 0 or (EPCM(DS:RCX).MODIFIED is not 0) )

THEN 

RFLAGS  1;
RAX  SGX_PAGE_NOT_MODIFIABLE;
GOTO DONE;

Table 41-30.  Concurrency Restrictions of EMODPR with Other Intel® SGX Operations 2 of 2

Operation

EREMOVE

EREPORT

ETRACK

EWB

EAUG

EMODPE

EMODPR

EMODT

EACCEPT

EACCEPTCOPY

Param Targ SECS Param SECS SECS

SRC VA SECS Targ SECS Targ SECI

NFO

Targ SEC

S

Targ SEC

S

Targ SECI

NFO

SECS Targ SR

C

SECI

NFO

EMODP

R

Targ

N

Y

Y

N

N

C

Y

C

C

C

Y

C

Y

Y

SECS

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Name

Type

Size (bits)

Description

TMP_SECS

Effective Address

32/64

Physical address of SECS to which EPC operand belongs.

SCRATCH_SECINFO

SECINFO

512

Scratch storage for holding the contents of DS:RBX.