Vol. 3A 5-33

PROTECTION

An Execute Disable Bit page fault can occur at all privilege levels. It can occur on any instruction fetch, including 
(but not limited to): near branches, far branches, CALL/RET/INT/IRET execution, sequential instruction fetches, 
and task switches. The execute-disable bit in the page translation mechanism is checked only when:

•

IA32_EFER.NXE = 1.

•

The instruction translation look-aside buffer (ITLB) is loaded with a page that is not already present in the ITLB.