36-70 Vol. 3C

INTEL® PROCESSOR TRACE

13f

Exception/Fault

0

0

1

* PIP if CR3 is updated (i.e., 

task switch), and OS=1

*PIP.NR=1 if destination is 

not root operation, and 

“Conceal VMX non-root 

operation from Intel PT” 

execution control = 0;

*TraceStop if BLIP is in a 

TraceStop region

PIP(NewCR3, NR?)?, 

TraceStop?

13b

Exception/Fault

0

1

1

* PIP if CR3 is updated (i.e., 

task switch), and OS=1

*PIP.NR=1 if destination is 

not root operation, and 

“Conceal VMX non-root 

operation from Intel PT” 

execution control = 0;

*MODE.Exec if the mode has 

changed since the last 

MODE.Exec, or if no 

MODE.Exec since last PSB 

PIP(NewCR3, NR?)?, 

MODE.Exec?, 

TIP.PGE(BLIP)

13c

Exception/Fault

1

0

0

FUP(CLIP), TIP.PGD()

13d

Exception/Fault

1

0

1

* PIP if CR3 is updated (i.e., 

task switch), and OS=1

*PIP.NR=1 if destination is 

not root operation, and 

“Conceal VMX non-root 

operation from Intel PT” 

execution control = 0;

*TraceStop if BLIP is in a 

TraceStop region

FUP(CLIP), PIP(NewCR3, 

NR?)?, TIP.PGD(BLIP), 

TraceStop?

13e

Exception/Fault

1

1

1

* PIP if CR3 is updated (i.e., 

task switch), and OS=1

*PIP.NR=1 if destination is 

not root operation, and 

“Conceal VMX non-root 

operation from Intel PT” 

execution control = 0;

* MODE.Exec if the opera-

tion changes CS.L/D or 

IA32_EFER.LMA 

FUP(CLIP), PIP(NewCR3, 

NR?)?, MODE.Exec?, 

TIP(BLIP)

14a

SMI (TraceEn cleared)

0

0

D.C.

None

14b

SMI (TraceEn cleared)

1

0

0

FUP(SMRAM,LIP), 

TIP.PGD()

14f

SMI (TraceEn cleared)

1

0

1

NA 

14c

SMI (TraceEn cleared)

1

1

1

NA 

15a

RSM, TraceEn restored to 0

0

0

0

None

15b

RSM, TraceEn restored to 1

0

0

D.C.

See WRMSR cases for 

packets on enable

Table 36-50. Packet Generation under Different Enable Conditions (Contd.)

Case

Operation

PktEn 

Before

PktEn 

After

CntxEn 

After

Other Dependencies

Packets Output