Vol. 3C 35-249

MODEL-SPECIFIC REGISTERS (MSRS)

17

Thermal Log 
When set, indicates that the Thermal Status bit has asserted since 

the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

19:18

Reserved.

20

Residency State Regulation Log 
When set, indicates that the Residency State Regulation Status bit 

has asserted since the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

21

Running Average Thermal Limit Log 
When set, indicates that the RATL Status bit has asserted since the 

log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

22

VR Therm Alert Log 
When set, indicates that the VR Therm Alert Status bit has 

asserted since the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

23

VR Thermal Design Current Log 
When set, indicates that the VR TDC Status bit has asserted since 

the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

24

Other Log 
When set, indicates that the Other Status bit has asserted since 

the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

25

Reserved 

26

Package/Platform-Level PL1 Power Limiting Log 
When set, indicates that the Package or Platform Level PL1 Power 

Limiting Status bit has asserted since the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

27

Package/Platform-Level PL2 Power Limiting Log
When set, indicates that the Package or Platform Level PL2/PL3 

Power Limiting Status bit has asserted since the log bit was last 

cleared.
This log bit will remain set until cleared by software writing 0.

28

Max Turbo Limit Log
When set, indicates that the Max Turbo Limit Status bit has 

asserted since the log bit was last cleared.
This log bit will remain set until cleared by software writing 0.

Table 35-37.  Additional MSRs Supported by 6th Generation Intel® Core™ Processors Based on Skylake 

Microarchitecture

Register 

Address

Register Name

Scope

Bit Description

 Hex

Dec