background image

35-222 Vol. 3C

MODEL-SPECIFIC REGISTERS (MSRS)

EEAH

MSR_C14_PMON_CTR2

Package

Uncore C-box 14 perfmon counter 2.

EEBH

MSR_C14_PMON_CTR3

Package

Uncore C-box 14 perfmon counter 3.

EF0H

MSR_C15_PMON_BOX_CTL

Package

Uncore C-box 15 perfmon local box wide control.

EF1H

MSR_C15_PMON_EVNTSEL0

Package

Uncore C-box 15 perfmon event select for C-box 15 counter 0.

EF2H

MSR_C15_PMON_EVNTSEL1

Package

Uncore C-box 15 perfmon event select for C-box 15 counter 1.

EF3H

MSR_C15_PMON_EVNTSEL2

Package

Uncore C-box 15 perfmon event select for C-box 15 counter 2.

EF4H

MSR_C15_PMON_EVNTSEL3

Package

Uncore C-box 15 perfmon event select for C-box 15 counter 3.

EF5H

MSR_C15_PMON_BOX_FILTER0

Package

Uncore C-box 15 perfmon box wide filter0.

EF6H

MSR_C15_PMON_BOX_FILTER1

Package

Uncore C-box 15 perfmon box wide filter1.

EF7H

MSR_C15_PMON_BOX_STATUS

Package

Uncore C-box 15 perfmon box wide status.

EF8H

MSR_C15_PMON_CTR0

Package

Uncore C-box 15 perfmon counter 0.

EF9H

MSR_C15_PMON_CTR1

Package

Uncore C-box 15 perfmon counter 1.

EFAH

MSR_C15_PMON_CTR2

Package

Uncore C-box 15 perfmon counter 2.

EFBH

MSR_C15_PMON_CTR3

Package

Uncore C-box 15 perfmon counter 3.

F00H

MSR_C16_PMON_BOX_CTL

Package

Uncore C-box 16 perfmon for box-wide control

F01H

MSR_C16_PMON_EVNTSEL0

Package

Uncore C-box 16 perfmon event select for C-box 16 counter 0.

F02H

MSR_C16_PMON_EVNTSEL1

Package

Uncore C-box 16 perfmon event select for C-box 16 counter 1.

F03H

MSR_C16_PMON_EVNTSEL2

Package

Uncore C-box 16 perfmon event select for C-box 16 counter 2.

F04H

MSR_C16_PMON_EVNTSEL3

Package

Uncore C-box 16 perfmon event select for C-box 16 counter 3.

F05H

MSR_C16_PMON_BOX_FILTER0

Package

Uncore C-box 16 perfmon box wide filter 0.

F06H

MSR_C16_PMON_BOX_FILTER1

Package

Uncore C-box 16 perfmon box wide filter 1.

F07H

MSR_C16_PMON_BOX_STATUS

Package

Uncore C-box 16 perfmon box wide status.

F08H

MSR_C16_PMON_CTR0

Package

Uncore C-box 16 perfmon counter 0.

F09H

MSR_C16_PMON_CTR1

Package

Uncore C-box 16 perfmon counter 1.

F0AH

MSR_C16_PMON_CTR2

Package

Uncore C-box 16 perfmon counter 2.

E0BH

MSR_C16_PMON_CTR3

Package

Uncore C-box 16 perfmon counter 3.

F10H

MSR_C17_PMON_BOX_CTL

Package

Uncore C-box 17 perfmon for box-wide control

F11H

MSR_C17_PMON_EVNTSEL0

Package

Uncore C-box 17 perfmon event select for C-box 17 counter 0.

F12H

MSR_C17_PMON_EVNTSEL1

Package

Uncore C-box 17 perfmon event select for C-box 17 counter 1.

F13H

MSR_C17_PMON_EVNTSEL2

Package

Uncore C-box 17 perfmon event select for C-box 17 counter 2.

F14H

MSR_C17_PMON_EVNTSEL3

Package

Uncore C-box 17 perfmon event select for C-box 17 counter 3.

F15H

MSR_C17_PMON_BOX_FILTER0

Package

Uncore C-box 17 perfmon box wide filter 0.

F16H

MSR_C17_PMON_BOX_FILTER1

Package

Uncore C-box 17 perfmon box wide filter1.

F17H

MSR_C17_PMON_BOX_STATUS

Package

Uncore C-box 17 perfmon box wide status.

F18H

MSR_C17_PMON_CTR0

Package

Uncore C-box 17 perfmon counter 0.

F19H

MSR_C17_PMON_CTR1

Package

Uncore C-box 17 perfmon counter 1.

F1AH

MSR_C17_PMON_CTR2

Package

Uncore C-box 17 perfmon counter 2.

Table 35-31.  Uncore PMU MSRs in Intel® Xeon® Processor E5 v3 Family (Contd.)

Register 

Address

Register Name

Scope

Bit Description

 Hex

Dec