35-122 Vol. 3C

MODEL-SPECIFIC REGISTERS (MSRS)

6C9H

1737

MSR_

LASTBRANCH_9_TO_IP

Thread

Last Branch Record 9 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CAH

1738

MSR_

LASTBRANCH_10_TO_IP

Thread

Last Branch Record 10 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CBH

1739

MSR_

LASTBRANCH_11_TO_IP

Thread

Last Branch Record 11 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CCH

1740

MSR_

LASTBRANCH_12_TO_IP

Thread

Last Branch Record 12 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CDH

1741

MSR_

LASTBRANCH_13_TO_IP

Thread

Last Branch Record 13 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CEH

1742

MSR_

LASTBRANCH_14_TO_IP

Thread

Last Branch Record 14 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

6CFH

1743

MSR_

LASTBRANCH_15_TO_IP

Thread

Last Branch Record 15 To IP (R/W)
See description of MSR_LASTBRANCH_0_TO_IP. 

802H

2050

IA32_X2APIC_APICID

Thread

x2APIC ID register (R/O) See x2APIC Specification.

803H

2051

IA32_X2APIC_VERSION

Thread

x2APIC Version register (R/O) 

808H

2056

IA32_X2APIC_TPR

Thread

x2APIC Task Priority register (R/W) 

80AH

2058

IA32_X2APIC_PPR

Thread

x2APIC Processor Priority register (R/O) 

80BH

2059

IA32_X2APIC_EOI

Thread

x2APIC EOI register (W/O) 

80DH

2061

IA32_X2APIC_LDR

Thread

x2APIC Logical Destination register (R/O) 

80FH

2063

IA32_X2APIC_SIVR

Thread

x2APIC Spurious Interrupt Vector register (R/W) 

810H

2064

IA32_X2APIC_ISR0

Thread

x2APIC In-Service register bits [31:0] (R/O) 

811H

2065

IA32_X2APIC_ISR1

Thread

x2APIC In-Service register bits [63:32] (R/O) 

812H

2066

IA32_X2APIC_ISR2

Thread

x2APIC In-Service register bits [95:64] (R/O) 

813H

2067

IA32_X2APIC_ISR3

Thread

x2APIC In-Service register bits [127:96] (R/O) 

814H

2068

IA32_X2APIC_ISR4

Thread

x2APIC In-Service register bits [159:128] (R/O) 

815H

2069

IA32_X2APIC_ISR5

Thread

x2APIC In-Service register bits [191:160] (R/O) 

816H

2070

IA32_X2APIC_ISR6

Thread

x2APIC In-Service register bits [223:192] (R/O) 

817H

2071

IA32_X2APIC_ISR7

Thread

x2APIC In-Service register bits [255:224] (R/O) 

818H

2072

IA32_X2APIC_TMR0

Thread

x2APIC Trigger Mode register bits [31:0] (R/O) 

819H

2073

IA32_X2APIC_TMR1

Thread

x2APIC Trigger Mode register bits [63:32] (R/O) 

81AH

2074

IA32_X2APIC_TMR2

Thread

x2APIC Trigger Mode register bits [95:64] (R/O) 

81BH

2075

IA32_X2APIC_TMR3

Thread

x2APIC Trigger Mode register bits [127:96] (R/O) 

81CH

2076

IA32_X2APIC_TMR4

Thread

x2APIC Trigger Mode register bits [159:128] (R/O) 

81DH

2077

IA32_X2APIC_TMR5

Thread

x2APIC Trigger Mode register bits [191:160] (R/O) 

81EH

2078

IA32_X2APIC_TMR6

Thread

x2APIC Trigger Mode register bits [223:192] (R/O) 

81FH

2079

IA32_X2APIC_TMR7

Thread

x2APIC Trigger Mode register bits [255:224] (R/O) 

Table 35-13.  MSRs in Processors Based on Intel® Microarchitecture Code Name Nehalem (Contd.)

Register 

Address

Register Name

Scope

Bit Description

 Hex

Dec