35-108 Vol. 3C
MODEL-SPECIFIC REGISTERS (MSRS)
15:8
Package
Maximum Non-Turbo Ratio (R/O)
The is the ratio of the frequency that invariant TSC runs at. The
invariant TSC frequency can be computed by multiplying this ratio
by 133.33 MHz.
27:16
Reserved.
28
Package
Programmable Ratio Limit for Turbo Mode (R/O)
When set to 1, indicates that Programmable Ratio Limits for Turbo
mode is enabled, and when set to 0, indicates Programmable Ratio
Limits for Turbo mode is disabled.
29
Package
Programmable TDC-TDP Limit for Turbo Mode (R/O)
When set to 1, indicates that TDC/TDP Limits for Turbo mode are
programmable, and when set to 0, indicates TDC and TDP Limits for
Turbo mode are not programmable.
39:30
Reserved.
47:40
Package
Maximum Efficiency Ratio (R/O)
The is the minimum ratio (maximum efficiency) that the processor
can operates, in units of 133.33MHz.
63:48
Reserved.
E2H
226
MSR_PKG_CST_CONFIG_
CONTROL
Core
C-State Configuration Control (R/W)
Note: C-state values are processor specific C-state code names,
unrelated to MWAIT extension C-state parameters or ACPI C-
States. See http://biosbits.org.
2:0
Package C-State Limit (R/W)
Specifies the lowest processor-specific C-state code name
(consuming the least power). for the package. The default is set as
factory-configured package C-state limit.
The following C-state code name encodings are supported:
000b: C0 (no package C-sate support)
001b: C1 (Behavior is the same as 000b)
010b: C3
011b: C6
100b: C7
101b and 110b: Reserved
111: No package C-state limit.
Note: This field cannot be used to limit package C-state to C3.
9:3
Reserved.
10
I/O MWAIT Redirection Enable (R/W)
When set, will map IO_read instructions sent to IO register
specified by MSR_PMG_IO_CAPTURE_BASE to MWAIT instructions.
14:11
Reserved.
15
CFG Lock (R/WO)
When set, lock bits 15:0 of this register until next reset.
Table 35-13. MSRs in Processors Based on Intel® Microarchitecture Code Name Nehalem (Contd.)
Register
Address
Register Name
Scope
Bit Description
Hex
Dec