Vol. 3C 35-105

MODEL-SPECIFIC REGISTERS (MSRS)

810H

2064

IA32_X2APIC_ISR0

Core

x2APIC In-Service register bits [31:0] (R/O) 

811H

2065

IA32_X2APIC_ISR1

Core

x2APIC In-Service register bits [63:32] (R/O) 

812H

2066

IA32_X2APIC_ISR2

Core

x2APIC In-Service register bits [95:64] (R/O) 

813H

2067

IA32_X2APIC_ISR3

Core

x2APIC In-Service register bits [127:96] (R/O) 

814H

2068

IA32_X2APIC_ISR4

Core

x2APIC In-Service register bits [159:128] (R/O) 

815H

2069

IA32_X2APIC_ISR5

Core

x2APIC In-Service register bits [191:160] (R/O) 

816H

2070

IA32_X2APIC_ISR6

Core

x2APIC In-Service register bits [223:192] (R/O) 

817H

2071

IA32_X2APIC_ISR7

Core

x2APIC In-Service register bits [255:224] (R/O) 

818H

2072

IA32_X2APIC_TMR0

Core

x2APIC Trigger Mode register bits [31:0] (R/O) 

819H

2073

IA32_X2APIC_TMR1

Core

x2APIC Trigger Mode register bits [63:32] (R/O) 

81AH

2074

IA32_X2APIC_TMR2

Core

x2APIC Trigger Mode register bits [95:64] (R/O) 

81BH

2075

IA32_X2APIC_TMR3

Core

x2APIC Trigger Mode register bits [127:96] (R/O) 

81CH

2076

IA32_X2APIC_TMR4

Core

x2APIC Trigger Mode register bits [159:128] (R/O) 

81DH

2077

IA32_X2APIC_TMR5

Core

x2APIC Trigger Mode register bits [191:160] (R/O) 

81EH

2078

IA32_X2APIC_TMR6

Core

x2APIC Trigger Mode register bits [223:192] (R/O) 

81FH

2079

IA32_X2APIC_TMR7

Core

x2APIC Trigger Mode register bits [255:224] (R/O) 

820H

2080

IA32_X2APIC_IRR0

Core

x2APIC Interrupt Request register bits [31:0] (R/O) 

821H

2081

IA32_X2APIC_IRR1

Core

x2APIC Interrupt Request register bits [63:32] (R/O) 

822H

2082

IA32_X2APIC_IRR2

Core

x2APIC Interrupt Request register bits [95:64] (R/O) 

823H

2083

IA32_X2APIC_IRR3

Core

x2APIC Interrupt Request register bits [127:96] (R/O) 

824H

2084

IA32_X2APIC_IRR4

Core

x2APIC Interrupt Request register bits [159:128] (R/O) 

825H

2085

IA32_X2APIC_IRR5

Core

x2APIC Interrupt Request register bits [191:160] (R/O) 

826H

2086

IA32_X2APIC_IRR6

Core

x2APIC Interrupt Request register bits [223:192] (R/O) 

827H

2087

IA32_X2APIC_IRR7

Core

x2APIC Interrupt Request register bits [255:224] (R/O) 

828H

2088

IA32_X2APIC_ESR

Core

x2APIC Error Status register (R/W) 

82FH

2095

IA32_X2APIC_LVT_CMCI

Core

x2APIC LVT Corrected Machine Check Interrupt register (R/W) 

830H

2096

IA32_X2APIC_ICR

Core

x2APIC Interrupt Command register (R/W) 

832H

2098

IA32_X2APIC_LVT_TIMER

Core

x2APIC LVT Timer Interrupt register (R/W) 

833H

2099

IA32_X2APIC_LVT_THERM

AL

Core

x2APIC LVT Thermal Sensor Interrupt register (R/W) 

834H

2100

IA32_X2APIC_LVT_PMI

Core

x2APIC LVT Performance Monitor register (R/W) 

835H

2101

IA32_X2APIC_LVT_LINT0

Core

x2APIC LVT LINT0 register (R/W) 

836H

2102

IA32_X2APIC_LVT_LINT1

Core

x2APIC LVT LINT1 register (R/W) 

837H

2103

IA32_X2APIC_LVT_ERROR

Core

x2APIC LVT Error register (R/W) 

838H

2104

IA32_X2APIC_INIT_COUNT

Core

x2APIC Initial Count register (R/W) 

839H

2105

IA32_X2APIC_CUR_COUNT

Core

x2APIC Current Count register (R/O) 

83EH

2110

IA32_X2APIC_DIV_CONF

Core

x2APIC Divide Configuration register (R/W) 

83FH

2111

IA32_X2APIC_SELF_IPI

Core

x2APIC Self IPI register (W/O) 

Table 35-12.   MSRs in Next Generation Intel Atom Processors Based on the Goldmont Microarchitecture (Contd.)

Address

Register Name

Scope

Bit Description

 Hex

Dec