32-6 Vol. 3C

VIRTUALIZATION OF SYSTEM RESOURCES

nisms can be derived by VMM developers according to the paging behavior defined in Chapter 3 of the Intel® 64 
and IA-32 Architectures Software Developer’s Manual, Volume 3A):
1. First consult the active PDE, which can be located using the upper 10 bits of the faulting address and the 

current value of CR3. The active PDE is the source of the fault if it is marked not present or if its R/W bit and 
U/S bits are inconsistent with the attempted guest access (the guest privilege level and the values of CR0.WP 
and CR4.SMEP should also be taken into account).

2. If the active PDE is the source of the fault, consult the corresponding guest PDE using the same 10 bits from the 

faulting address and the physical address that corresponds to the guest address in the guest CR3. If the guest 
PDE would cause a page fault (for example: it is marked not present), then raise a page fault to the guest 
operating system. 
The following steps assume that the guest PDE would not have caused a page fault.

3. If the active PDE is the source of the fault and the guest PDE contains, as page-table base address (if PS = 0) 

or page base address (PS = 1), a guest address that the VMM has chosen not to support; then raise a machine 
check (or some other abort) to the guest operating system. 
The following steps assume that the guest address in the guest PDE is supported for the virtual machine.

4. If the active PDE is marked not-present, then set the active PDE to correspond to guest PDE as follows:

a. If the active PDE contains a page-table base address (if PS = 0), then allocate an aligned 4-KByte active 

page table marked completely invalid and set the page-table base address in the active PDE to be the 
physical address of the newly allocated page table.

b. If the active PDE contains a page base address (if PS = 1), then set the page base address in the active PDE 

to be the physical page base address that corresponds to the guest address in the guest PDE.

c. Set the P, U/S, and PS bits in the active PDE to be identical to those in the guest PDE.
d. Set the PWT, PCD, and G bits according to the policy of the VMM.
e. Set A = 1 in the guest PDE.
f.

If D = 1 in the guest PDE or PS = 0 (meaning that this PDE refers to a page table), then set the R/W bit in 
the active PDE as in the guest PDE.

g. If D = 0 in the guest PDE, PS = 1 (this is a 4-MByte page), and the attempted access is a write; then set 

R/W in the active PDE as in the guest PDE and set D = 1 in the guest PDE.

h. If D = 0 in the guest PDE, PS = 1, and the attempted access is not a write; then set R/W = 0 in the active 

PDE.

i.

After modifying the active PDE, re-execute the faulting instruction. 

The remaining steps assume that the active PDE is already marked present.

5. If the active PDE is the source of the fault, the active PDE refers to a 4-MByte page (PS = 1), the attempted 

access is a write; D = 0 in the guest PDE, and the active PDE has caused a fault solely because it has R/W = 0; 
then set R/W in the active PDE as in the guest PDE; set D = 1 in the guest PDE, and re-execute the faulting 
instruction.

6. If the active PDE is the source of the fault and none of the above cases apply, then raise a page fault of the 

guest operating system. 
The remaining steps assume that the source of the original page fault is not the active PDE.

NOTE

It is possible that the active PDE might be causing a fault even though the guest PDE would not. 
However, this can happen only if the guest operating system increased access in the guest PDE and 
did not take action to ensure that older translations were flushed from the TLB. Such translations 
might have caused a page fault if the guest software were running on bare hardware.

7. If the active PDE refers to a 4-MByte page (PS = 1) but is not the source of the fault, then the fault resulted 

from an inconsistency between the active page-table hierarchy and the processor’s TLB. Since the transition to