27-30 Vol. 3C
VM EXITS
VMX-abort on another. For this reason, it is recommended that software running in VMX root operation zero the
VMX-abort indicator in the VMCS region of any VMCS that it uses.
After saving the VMX-abort indicator, operation of a logical processor experiencing a VMX abort depends on
whether the logical processor is in SMX operation:
1
•
If the logical processor is in SMX operation, an Intel
®
TXT shutdown condition occurs. The error code used is
000DH, indicating “VMX abort.” See Intel
®
Trusted Execution Technology Measured Launched Environment
Programming Guide.
•
If the logical processor is outside SMX operation, it issues a special bus cycle (to notify the chipset) and enters
the VMX-abort shutdown state. RESET is the only event that wakes a logical processor from the VMX-abort
shutdown state. The following events do not affect a logical processor in this state: machine-check events; INIT
signals; external interrupts; non-maskable interrupts (NMIs); start-up IPIs (SIPIs); and system-management
interrupts (SMIs).
27.8
MACHINE-CHECK EVENTS DURING VM EXIT
If a machine-check event occurs during VM exit, one of the following occurs:
•
The machine-check event is handled as if it occurred before the VM exit:
— If CR4.MCE = 0, operation of the logical processor depends on whether the logical processor is in SMX
operation:
2
•
If the logical processor is in SMX operation, an Intel
®
TXT shutdown condition occurs. The error code
used is 000CH, indicating “unrecoverable machine-check condition.”
•
If the logical processor is outside SMX operation, it goes to the shutdown state.
— If CR4.MCE = 1, a machine-check exception (#MC) is generated:
•
If bit 18 (#MC) of the exception bitmap is 0, the exception is delivered through the guest IDT.
•
If bit 18 of the exception bitmap is 1, the exception causes a VM exit.
•
The machine-check event is handled after VM exit completes:
— If the VM exit ends with CR4.MCE = 0, operation of the logical processor depends on whether the logical
processor is in SMX operation:
•
If the logical processor is in SMX operation, an Intel
®
TXT shutdown condition occurs with error code
000CH (unrecoverable machine-check condition).
•
If the logical processor is outside SMX operation, it goes to the shutdown state.
— If the VM exit ends with CR4.MCE = 1, a machine-check exception (#MC) is delivered through the host IDT.
•
A VMX abort is generated (see Section 27.7). The logical processor blocks events as done normally in
VMX abort. The VMX abort indicator is 5, for “machine-check event during VM exit.”
The first option is not used if the machine-check event occurs after any host state has been loaded. The second
option is used only if VM entry is able to load all host state.
1. A logical processor is in SMX operation if GETSEC[SEXIT] has not been executed since the last execution of GETSEC[SENTER]. A logi-
cal processor is outside SMX operation if GETSEC[SENTER] has not been executed or if GETSEC[SEXIT] was executed after the last
execution of GETSEC[SENTER]. See Chapter 6, “Safer Mode Extensions Reference,” in Intel® 64 and IA-32 Architectures Software
Developer’s Manual, Volume 2B.
2. A logical processor is in SMX operation if GETSEC[SEXIT] has not been executed since the last execution of GETSEC[SENTER]. A logi-
cal processor is outside SMX operation if GETSEC[SENTER] has not been executed or if GETSEC[SEXIT] was executed after the last
execution of GETSEC[SENTER]. See Chapter 6, “Safer Mode Extensions Reference,” in Intel® 64 and IA-32 Architectures Software