INSTRUCTION SET REFERENCE, A-L

Vol. 2A 3-9

The Compatibility/Legacy Mode support is to the right of the ‘slash’ and has the following notation:
• V — Supported.
• I — Not supported.
• N.E. — Indicates an Intel 64 instruction mnemonics/syntax that is not encodable; the opcode sequence is not
applicable as an individual instruction in compatibility mode or IA-32 mode. The opcode may represent a valid
sequence of legacy IA-32 instructions.

3.1.1.6  

CPUID Support Column in the Instruction Summary Table

The fourth column holds abbreviated CPUID feature flags (e.g., appropriate bit in CPUID.1.ECX, CPUID.1.EDX
for SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AESNI/PCLMULQDQ/AVX/RDRAND support) that indicate processor
support for the instruction. If the corresponding flag is ‘0’, the instruction will #UD.

3.1.1.7  

Description Column in the Instruction Summary Table

The “Description” column briefly explains forms of the instruction. 

3.1.1.8  

Description Section 

Each instruction is then described by number of information sections. The “Description” section describes the 
purpose of the instructions and required operands in more detail.
Summary of terms that may be used in the description section:

•

Legacy SSE — Refers to SSE, SSE2, SSE3, SSSE3, SSE4, AESNI, PCLMULQDQ and any future instruction sets 
referencing XMM registers and encoded without a VEX prefix.

•

VEX.vvvv — The VEX bit field specifying a source or destination register (in 1’s complement form).

•

rm_field — shorthand for the ModR/M r/m field and any REX.B

•

reg_field — shorthand for the ModR/M reg field and any REX.R

3.1.1.9  

Operation Section

The “Operation” section contains an algorithm description (frequently written in pseudo-code) for the instruction. 
Algorithms are composed of the following elements:

•

Comments are enclosed within the symbol pairs “(*” and “*)”. 

•

Compound statements are enclosed in keywords, such as: IF, THEN, ELSE and FI for an if statement; DO and 
OD for a do statement; or CASE... OF for a case statement.

•

A register name implies the contents of the register. A register name enclosed in brackets implies the contents 
of the location whose address is contained in that register. For example, ES:[DI] indicates the contents of the 
location whose ES segment relative address is in register DI. [SI] indicates the contents of the address 
contained in register SI relative to the SI register’s default segment (DS) or the overridden segment.

•

Parentheses around the “E” in a general-purpose register name, such as (E)SI, indicates that the offset is read 
from the SI register if the address-size attribute is 16, from the ESI register if the address-size attribute is 32. 
Parentheses around the “R” in a general-purpose register name, (R)SI, in the presence of a 64-bit register 
definition such as (R)SI, indicates that the offset is read from the 64-bit RSI register if the address-size 
attribute is 64.

•

Brackets are used for memory operands where they mean that the contents of the memory location is a 
segment-relative offset. For example, [SRC] indicates that the content of the source operand is a segment-
relative offset.

•

A ← B indicates that the value of B is assigned to A.

•

The symbols 

=

, 

≠

, 

>

, 

<

, ≥, and ≤ are relational operators used to compare two values: meaning equal, not 

equal, greater or equal, less or equal, respectively. A relational expression such as A = B is TRUE if the value of 

A is equal to B; otherwise it is FALSE.