15-4 Vol. 1

PROGRAMMING WITH INTEL® AVX-512

Prior to using AVX-512 Foundation instructions, the application must identify that the operating system supports 
the XGETBV instruction and the ZMM register state, in addition to confirming the processor’s support for ZMM state 
management using XSAVE/XRSTOR and AVX-512 Foundation instructions. The following simplified sequence 
accomplishes both and is strongly recommended.
1. Detect CPUID.1:ECX.OSXSAVE[bit 27] = 1 (XGETBV enabled for application use

1

).

2. Execute XGETBV and verify that XCR0[7:5] = ‘111b’ (OPMASK state, upper 256-bit of ZMM0-ZMM15 and 

ZMM16-ZMM31 state are enabled by OS) and that XCR0[2:1] = ‘11b’ (XMM state and YMM state are enabled by 
OS).

3. Detect CPUID.0x7.0:EBX.AVX512F[bit 16] = 1.

15.2.1 

Additional 512-bit Instruction Extensions of the Intel AVX-512 Family

Processor support of the Intel AVX-512 Exponential and Reciprocal instructions are indicated by querying the 
feature flag:

•

If CPUID.(EAX=07H, ECX=0):EBX.AVX512ER[bit 27] = 1, the collection of 
VEXP2PD/VEXP2PS/VRCP28xx/VRSQRT28xx instructions are supported.

Processor support of the Intel AVX-512 Prefetch instructions are indicated by querying the feature flag:

•

If CPUID.(EAX=07H, ECX=0):EBX.AVX512PF[bit 26] = 1, a collection of 
VGATHERPF0xxx/VGATHERPF1xxx/VSCATTERPF0xxx/VSCATTERPF1xxx instructions are supported. 

Detection of 512-bit instructions operating on ZMM states and opmask registers, outside of AVX-512 Foundation, 
needs to follow the general procedural flow in Figure 15-3.

Figure 15-2.  Procedural Flow for Application Detection of AVX-512 Foundation Instructions

1. If CPUID.01H:ECX.OSXSAVE reports 1, it also indirectly implies the processor supports XSAVE, XRSTOR, XGETBV, processor 

extended state bit vector XCR0 register. Thus an application may streamline the checking of CPUID feature flags for XSAVE and OSX-
SAVE. XSETBV is a privileged instruction.

Implied HW support for

Check enabled state in

XCR0 via XGETBV

Check AVX512F flag 

Check feature flag

CPUID.1H:ECX.OSXSAVE = 1? 

OS provides processor

extended state management

States

ok to use

XSAVE, XRSTOR, XGETBV, XCR0

enabled

Instructions

Yes 

YMM,ZMM

Opmask,